![]() I would be grateful if someone can clarify the relationship between Tables 1 & 2 and the Table 3. The reason I expect this to match CRC hardware is that both have concept of a polynomial that decides where we tap to get the feedback bits. The mixture of DFFs and Synchronous RAM blocks is confusing me as it does not match a simple shift register chain with XOR gates in feedback as used with CRC checking hardware. Is there a way that I might carry out simulation using this information in C language or otherwise? In Table 3 it gives the "XNOR form" and the length of the chain used to generate the random bit sequence.What would be the structure to implement 12 bit and 16 bit random bit sequence?. ![]()
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